Parallel approach to genetic algorithms for evolvable hardware

Abstract

The thesis proposes the cellular compact genetic algorithm (CCGA), which is a parallel probabilistic model-building genetic algorithm for evolvable hardware. CCGA replaces traditional migration of individuals with the probabilistic migration. Each CCGA node uses the traditional compact GA with elitism. CCGA employs adaptive combination of probability vectors from its neighbors. CCGA can solve hard problems of bounded difficulty. With parallel approach, CCGA supports scalability. In addition, CCGA is designed for hardware implementation. The scalable hardware architecture for CCGA is proposed. For each node of CCGA, the scalable hardware architecture supports expandable number of variables to be optimized with flexible precision and expandable chromosome length. Evolvable hardware based-on Cellular Genetic Algorithm (CCGA) and Block-based neural network (BBNN) is presented. The layer-based architecture is proposed for integrating CCGA with BBNN in hardware. A hardware design of BBNN neurons is proposed. The link-multiplexed concept is used for hardware design of BBNN neurons. The proposed evolvable hardware based-on CCGA and BBNN is applied to the problem of online ECG signal classification. This demonstrates that CCGA can solve the real-world problems. The proposed evolvable hardware can be implemented in FPGA or ASIC for a portable personalized ECG signal classifications for long term patient monitoring.